The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Hard disk drives (HDDs) have one or more magnetic disks and a read/write head positioned over the one or more magnetic disks for reading and writing data to the one or more magnetic disks. The read/write head has a magnetic source such as a magnetic coil which applies a varying magnetic field to the magnetic disk indicative of data to be written to the magnetic disk as the disk rotates. The magnetic field magnetizes portions of the magnetic disk in accordance with the applied magnetic field to write the data to the magnetic disk. To read the data that was written, the read/write head has a magnetic resistor (MR) whose resistance changes based on the magnetization of the magnetic disk under the read/write head as the magnetic disk rotates.
A preamplifier of the HDD outputs a signal indicative of this change in resistance which is used by signal processing circuitry to read the data on the magnetic disk. To facilitate generating this signal indicative of the change in resistance, the preamplifier has a bias circuit which applies a constant bias voltage across two terminals of the MR. If the resistance of the MR has not changed, then the voltage across the MR is the same as a voltage of a voltage source. If the resistance of the MR changes, then the voltage across the MR is not the same as the voltage of the voltage source. To maintain the constant bias voltage if the resistance changes, the bias circuit has a closed loop gain stage. The closed loop gain stage provides an output indicative of a difference between currents i1, i2 in respective branches of the bias circuit. Each branch includes a transistor with an emitter coupled to a terminal of the MR and a base coupled to a terminal of the voltage source. When currents i1 and i2 are not equal, then a base to emitter voltage (Vbe) for one transistor in one branch is not equal to a base to emitter voltage (Vbe) for the other transistor in the other branch and the voltage across the MR is not the same as the voltage of the voltage source. Based on the output from the closed loop gain stage, a source current generated by two current mirrors and a sink current generated by one current mirror are applied to respective terminals of the MR to cause i1 and i2 to be equal again. The bias voltage across the MR is equal again to the voltage of the voltage source.
The source current and the sink current each take time to each settle after being changed. Further, the time for each current to settle is different. The difference in settling time produces voltage glitches at the MR and on the signal output by the preamplifier which is used by signal processing circuitry to read the data on the magnetic disk.